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Low Power FSM Synthesis : ウィキペディア英語版 | Low Power FSM Synthesis
== Introduction == Finite State Machines (FSMs) are widely used to implement control logic in various applications such as microprocessors, digital transmission, digital filters and digital signal processing. Even for designs containing a good number of datapath elements, the controller occupies a sizeable portion. As the devices are mostly portable and hand-held, reducing power dissipation has emerged as the primary concern of today’s VLSI designers. While the datapath elements can be shutdown when they are not being used, controllers are always active. As a result, the controller consumes a good amount of system power. Thus, power-efficient synthesis of FSM has come up as a very important problem domain, attracting lot of research. The synthesis method must be able to reduce both dynamic power and leakage power consumed by the circuit.
抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「Low Power FSM Synthesis」の詳細全文を読む
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